跳到正文
研踪PaperTrail
← 研踪 PaperTrail

arXiv:2611.06127 · v1

NN-Based FeFET Compact Modeling for SPICE Simulation

首次提交 2026-11-04 16:11
版本更新 2026-11-04 16:11
雷达观测 2026-11-05 11:10
arXiv ↗PDF ↗

摘要

Prototyping and early-stage circuit evaluation for emerging transistor technologies require fast and accurate compact models for SPICE simulations. Standard physics-based compact models, such as BSIM, offer high fidelity but demand extensive domain expertise and time-consuming equation formulation for every new physical effect, significantly slowing technology development. Neural network (NN)-based models offer a scalable alternative approach, but they rely heavily on smooth numerical solver data with explicit high-order derivative information. However, measurement data suffers from complex noise patterns, making derivative extraction challenging and complicating NN-based transistor modeling. This work presents a derivative-free NN training framework employing spectral normalization to naturally smooth derivative behavior and filter measurement noise. Using drain current measurements from a fabricated 28 nm ferroelectric device, we design an NN-based compact model that captures the full spectrum of polarization amplitudes and supports dynamic polarization switching in transient simulations. To demonstrate its capability, we deploy the model in a commercial SPICE software to simulate write and read operations for large-scale memory arrays with up to 512x512 size, including parasitic effects. Our approach bridges raw measurements with NN-based SPICE-compatible transistor modeling, significantly reducing model development time and enabling rapid circuit-level prototyping for emerging devices.

作者备注:7 pages

AI 论文解读

基于摘要 · 非全文审阅

此版本尚未生成 AI 解读。解读由后台任务生成并按论文版本保存,登录后共享已有结果。

版本差异

目前只观测到一个版本,无法比较变化。之后收录新版本时,会在这里对照标题、作者、分类和摘要。

观测到的版本

相邻记录可能跳过中间版本;首次发现 v2 及以上也会标为版本更新。

v1 · 2026-11-04 16:11 · 最新观测版本

NN-Based FeFET Compact Modeling for SPICE Simulation

Prototyping and early-stage circuit evaluation for emerging transistor technologies require fast and accurate compact models for SPICE simulations. Standard physics-based compact models, such as BSIM, offer high fidelity but demand extensive domain expertise and time-consuming equation formulation for every new physical effect, significantly slowing technology development. Neural network (NN)-based models offer a scalable alternative approach, but they rely heavily on smooth numerical solver data with explicit high-order derivative information. However, measurement data suffers from complex noise patterns, making derivative extraction challenging and complicating NN-based transistor modeling. This work presents a derivative-free NN training framework employing spectral normalization to naturally smooth derivative behavior and filter measurement noise. Using drain current measurements from a fabricated 28 nm ferroelectric device, we design an NN-based compact model that captures the full spectrum of polarization amplitudes and supports dynamic polarization switching in transient simulations. To demonstrate its capability, we deploy the model in a commercial SPICE software to simulate write and read operations for large-scale memory arrays with up to 512x512 size, including parasitic effects. Our approach bridges raw measurements with NN-based SPICE-compatible transistor modeling, significantly reducing model development time and enabling rapid circuit-level prototyping for emerging devices.

查看此版本解读 →查看此版本原文 ↗