Nikolai Chukhin, Karthik Gajulapalli, Alexander Golovnev, Ivan Mihajlin
原文摘要
We prove unconditionally that either NE contains a language requiring Boolean circuits of size at least $2^n/(2n)$, or $VP^0_{\mathbb{Z}}\ne VNP^0_{\mathbb{Z}}$, a constant-free version of Valiant's conjecture over the integers. The Boolean alternative implies that $NP\not\subseteq SIZE[n^k]$ for every constant $k\ge1$. Our proof gives a fine-grained variant of the connection between Polynomial Identity Testing (PIT) and circuit lower bounds established by Kabanets and Impagliazzo (2004). We show that the specific identity tests required by this argument can be performed over the integers without a derandomization assumption. Over a fixed finite field $\mathbb{F}$, we first give a deterministic $O(st^{d-1})$-time algorithm for PIT on size-$s$ circuits computing degree-$d$ polynomials in $t$ variables. We further show that, for any fixed $d\ge2$ and $\varepsilon>0$, improving this running time by a factor of $t^{\varepsilon}$, even nondeterministically, implies either the same Boolean lower bound or an arithmetic circuit lower bound of $t^{1+\varepsilon/2}$ for a polynomial family from $VNP_{\mathbb{F}}$. If nondeterministic PIT instead runs in time $s^{o(d)}t^{(1-\varepsilon)d}$ for infinitely many degrees $d$, then the arithmetic lower bound strengthens to $VP_{\mathbb{F}}\ne VNP_{\mathbb{F}}$. Over the integers, we give a deterministic PIT algorithm for syntactically set-multilinear circuits running in time $s^{O(1)}t^{5d/6}$, which yields the unconditional result above. Combining the Kabanets-Impagliazzo argument with range avoidance, we show that an NP algorithm for PIT over $\mathbb{Z}$ gives a purely arithmetic win-win: either $VP_{\mathbb{Z}}\ne VNP_{\mathbb{Z}}$, or constant-degree polynomials of maximum circuit complexity can be constructed in FNP.
A hyperclique in an $r$-uniform hypergraph is a set of vertices in which every $r$-subset is an edge. A simple exhaustive search algorithm detects a hyperclique on $\ell$ vertices in an $r$-uniform hypergraph on $m$ vertices by checking all $\binom{m}{\ell}$ sets of $\ell$ vertices. This algorithm can be expressed as a depth-two circuit with at most $m^\ell$ gates and wires. For hypercliques of *constant* size, Amano (2010) showed that this circuit is almost optimal: for large $r$, constant-depth circuits need $m^{\ell(1-O(\log r/r))}$ wires. We prove that this circuit remains hard to beat even for hypercliques of *polynomial* size. More precisely, circuits of depth $h$ need $m^{Ω(\ell)}$ gates for $\ell\leq m^{1/h-\varepsilon}$, and $m^{\ell(1-O(\log r/r))}$ gates for $\ell=m^{o(1)}$ that tends to infinity. Our hyperclique bound and the method behind it also lead to lower bounds for two central problems of fine-grained complexity. First, we extend the bound $n^{k/4}$ of Rossman (2008) for $k$-Clique from cliques of *constant* size to cliques of *polynomial* size: circuits of depth $h$ detecting a clique on $k$ vertices in an $n$-vertex graph need $n^{Ω(k)}$ gates for $k\leq n^{1/(h-1)-\varepsilon}$. Second, a reduction of Choudhury, Limaye, Sreenivasaiah, and Srinivasan (2026) turns our hyperclique bound into a lower bound of $n^{k-\varepsilon}$ gates for $k$-Orthogonal Vectors ($k$-OV) at every fixed depth for vectors of dimension $\log^{O(1)} n$; this proves the $k$-OV Conjecture for constant-depth circuits in polylogarithmic dimension. Finally, for $2$-OV in logarithmic dimension, we give a simple proof that depth-three circuits need $Ω(n^2)$ wires, which answers a question of Kane and Williams (2019).