arXiv:2510.11361 · v2

A protocol to reduce worst-case latency in deflection-based on-chip networks

首次提交 2025-10-13 21:02

版本更新 2026-11-09 06:06

雷达观测 2026-11-10 13:19

摘要

We present a novel protocol that reduces worst-case packet latency in deflection-based on-chip interconnect networks. It enforces the deflection of the header of a packet but not its payload, resulting in a reduction in overall network traffic and, more importantly, worst-case packet latency due to decreased pre-injection latency.