← 研踪 PaperTrailarXiv:2608.06875 · v2
QCORE: A Quantum-Computing-Oriented,Resource-Efficient Runtime Architecture with Lifecycle Coordination
首次提交 2026-08-07 15:01
版本更新 2026-11-09 20:57
雷达观测 2026-11-10 15:22
摘要
As quantum processors scale, online calibration, quantum error correction (QEC), and measurement-driven feedback require continuous classical processing and parameter updates. Sharing on-chip resources reduces hardware cost, but computation completion, the last parameter read, and result consumption occur at different times. Their dependencies must be managed separately while preserving quantum operations' real-time requirements. We present QCORE, a quantum-computing-oriented, resource-efficient runtime architecture that coordinates these lifecycles for safe resource reuse and parameter consistency. QCORE models resource occupancy, parameter protection, and consumer dependencies as independent lifecycles and provides three mechanisms: pre-use checks and parameter binding to verify timing, identity, and dependencies; access-aware protection through value snapshots, version references, or active-configuration windows; and joint admission of resource reservations and parameter installation. After request submission, hardware autonomously handles admission, protection, installation, and reclamation, reducing fine-grained Host coordination and providing a foundation for one Host to manage multiple controllers. We implement synthesizable RTL and validate FPGA timing at 100 MHz. Independent release reduces whole-program execution time by 16.83% in Ramsey calibration and QEC replay. Joint admission increases on-time completions from 5/15 to 15/15 under contention across five arrival phases. Under identical external deadlines, a shared NN backend reduces LUT usage by 12.28%-13.81% and DSP usage by 39.39% compared with two statically assigned backends. These results show that lifecycle coordination exploits inter-task timing slack for on-chip sharing, increasing service capacity under limited resources.
作者备注：18 pages, 10 figures
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v2 · 2026-11-09 20:57 · 最新观测版本
QCORE: A Quantum-Computing-Oriented,Resource-Efficient Runtime Architecture with Lifecycle Coordination
As quantum processors scale, online calibration, quantum error correction (QEC), and measurement-driven feedback require continuous classical processing and parameter updates. Sharing on-chip resources reduces hardware cost, but computation completion, the last parameter read, and result consumption occur at different times. Their dependencies must be managed separately while preserving quantum operations' real-time requirements. We present QCORE, a quantum-computing-oriented, resource-efficient runtime architecture that coordinates these lifecycles for safe resource reuse and parameter consistency. QCORE models resource occupancy, parameter protection, and consumer dependencies as independent lifecycles and provides three mechanisms: pre-use checks and parameter binding to verify timing, identity, and dependencies; access-aware protection through value snapshots, version references, or active-configuration windows; and joint admission of resource reservations and parameter installation. After request submission, hardware autonomously handles admission, protection, installation, and reclamation, reducing fine-grained Host coordination and providing a foundation for one Host to manage multiple controllers. We implement synthesizable RTL and validate FPGA timing at 100 MHz. Independent release reduces whole-program execution time by 16.83% in Ramsey calibration and QEC replay. Joint admission increases on-time completions from 5/15 to 15/15 under contention across five arrival phases. Under identical external deadlines, a shared NN backend reduces LUT usage by 12.28%-13.81% and DSP usage by 39.39% compared with two statically assigned backends. These results show that lifecycle coordination exploits inter-task timing slack for on-chip sharing, increasing service capacity under limited resources.
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