← 研踪 PaperTrailarXiv:2611.17065 · v1
NonSense: On the (In)security of FPGA Anti-tamper Sensors
首次提交 2026-11-13 00:40
版本更新 2026-11-13 00:40
雷达观测 2026-11-13 14:15
摘要
FPGAs are widely used in mission-critical systems, where a successful physical attack can have serious consequences. This makes resilience to such attacks a critical security requirement. To defend against active physical attacks, such as glitching attacks, modern FPGAs rely on on-chip sensors that detect these disturbances and trigger responses, such as key zeroization, before a device is compromised. These sensors are deployed as both hard-IP blocks and soft-IP cores, and their trustworthiness is often taken for granted. In this work, we challenge that assumption and argue that the sensors themselves are a fragile and underexplored attack surface. Drawing on recent results, we show that both the detection and response mechanisms of state-of-the-art sensors can be bypassed without invasive tampering. We further argue that sensor reliability is reduced by factors rarely captured in threat models, including the spatial and frequency-dependent behavior of the system's power delivery network, which can steer a fault to a target while sparing nearby sensors; environmental conditions such as temperature, which shift detection thresholds; and long-term aging, which drifts sensor calibration and may open silent detection gaps. Finally, we propose a set of countermeasures that harden detection and response mechanisms against these effects.
观测到的版本
相邻记录可能跳过中间版本；首次发现 v2 及以上也会标为版本更新。
v1 · 2026-11-13 00:40 · 最新观测版本
NonSense: On the (In)security of FPGA Anti-tamper Sensors
FPGAs are widely used in mission-critical systems, where a successful physical attack can have serious consequences. This makes resilience to such attacks a critical security requirement. To defend against active physical attacks, such as glitching attacks, modern FPGAs rely on on-chip sensors that detect these disturbances and trigger responses, such as key zeroization, before a device is compromised. These sensors are deployed as both hard-IP blocks and soft-IP cores, and their trustworthiness is often taken for granted. In this work, we challenge that assumption and argue that the sensors themselves are a fragile and underexplored attack surface. Drawing on recent results, we show that both the detection and response mechanisms of state-of-the-art sensors can be bypassed without invasive tampering. We further argue that sensor reliability is reduced by factors rarely captured in threat models, including the spatial and frequency-dependent behavior of the system's power delivery network, which can steer a fault to a target while sparing nearby sensors; environmental conditions such as temperature, which shift detection thresholds; and long-term aging, which drifts sensor calibration and may open silent detection gaps. Finally, we propose a set of countermeasures that harden detection and response mechanisms against these effects.
查看此版本解读 →查看此版本原文 ↗